Excess 3 Adder: Add 2 three digits numbers in excess 3....

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Virulog_X

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Excess 3 Adder: Add 2 three digits numbers in excess 3.
ex. 998+345 in excess 3.

i don\'t have any idea on how to continue, please help.
thx !

module Decimal_to_E3(input[10:0] dec, output reg[15:0] E3);
reg[10:0] aux;
reg[1:0] counter;
always @ (dec) begin
aux = dec;
E3 = {4{4\'b0011}};
counter = 2\'b00;
while(aux != 0) begin
E3[counter * 4 +: 4] = aux % 10 + 3;
aux = aux / 10;
counter = counter + 1;
end
end
endmodule


//E3_Adder

module E3_Adder(input [11:0] in_1, in_2,
output [15:0] out_1);

PA v1(in_1[3:0],in_2[3:0], out_1[3:0], cout);
//how do i continue ????

endmodule



module PA(a,b,sum,cout);
input [3:0]a, b;
output cout;
output [3:0]sum;
wire c0,c1,c2;
HA u1(a[0], b[0], sum[0], c0);
FA u2(a[1], b[1], c0, sum[1], c1);
FA u3(a[2], b[2], c1, sum[2], c2);
FA u4(a[3], b[3], c2, sum[3], cout);
endmodule



module FA(a, b, cin, sum, carry);
input a, b, cin;
output sum, carry;
wire sum, carry;
assign sum = a^b^cin;//sum bit
assign carry = ((a&b) | (b&cin) | (a&cin));//carry bit
endmodule


module HA(a, b, sum, carry);
input a, b;
output sum, carry;
wire sum, carry;
assign sum = a^b;
assign carry = a&b;
endmodule


/*
module P_Adder(a,b,sum, cin, cout);
input a
*/


module Decimal_to_E3_tb();
reg[10:0] dec_tb;
wire[15:0] E3_tb;

Decimal_to_E3 DUT(.dec(dec_tb), .E3(E3_tb));
initial begin
for(dec_tb = 0; dec_tb <= 2000; dec_tb = dec_tb + 1) begin
#1;
$display(\"For value = %d, the output is = %0X\", dec_tb, E3_tb);
end
end
endmodule

/*
Arhitectura lui E3_Adder_tb este:
______________________________ ________________________
| | | |
test_input_1 --.------>|>dec E3>|---in_1_tb---->|>in_1 |
| | Decimal_to_E3 | | |
| |_____________________________| | | ___________
| | E3_Adder | | |
| ______________________________ | [DUT] out_1>|----out_1_tb_actual-------------------------------->| |
| | | | | | |
test_input_2 - ( --.-->|>dec E3>|---in_2_tb---->|>in_2 | | |
| | | Decimal_to_E3 | | | | |
| | |_____________________________| |________________________| | |
| | _________ ______________________________ | Comparare |----REZULTAT_TEST------->
| |---------------------test_input_2-------->| | | | | |
| | | | | | |
| | + |-----test_output_1--->|>dec E3>|---out_1_tb_exp---->| |
| | | | Decimal_to_E3 | | |
|-------------------------test_input_1-------->|_________| |______________________________| |___________|
*/
module E3_Adder_tb();
/*
Urmatorii parametrii ai testului pot fi modificati:
DISPLAY_ALL: 0 sau 1. Daca DISPLAY_ALL este 1, atunci mai multe detalii despre fiecare test vor fi afisate pe ecran.
Altfel, doar rezultatul testului va fi tiparit, cu diferenta dintre rezultatul corect si cel caclulat de E3_Adder, in cazul in care difera.
DISPLAY_FAILED: 0 sau 1. Daca DISPLAY_FAILED este 1, atunci doar testele failed vor fi afisate pe ecran. Altfel, si rezultatele passed se vor afisa.
NAX_VAL_in1: Valoarea maxima la care poate ajunge intrarea in_1, exprimata in decimal.
MAX_VAL_in2: Valoarea maxima la care poate ajunge intrare in_2, exprimata in decimal.
Testul va lua toate perechile de (in_1, in_2) din intervalul MAX_VAL_in1 X MAX_VAL_in2 si va compara rezultatul obtinut de E3_Adder cu cel corect

IMPORTANT: Nota pentru testbenchul public va fi acordata pentru testele care ruleaza cu MAX_VAL_in1 = 500 si MAX_VAL_in2 = 500
*/

wire[11:0] in_1_tb, in_2_tb;
reg[10:0] test_input_1, test_input_2, test_output_1;
wire[15:0] out_1_tb_actual, out_1_tb_exp;


reg[10:0] MAX_VAL_in1, MAX_VAL_in2;
reg DISPLAY_ALL, DISPLAY_ONLY_FAILED;
integer n_tests_passed, n_tests_total;
/* Modul ajutator de convertire din decimal in E3 */
Decimal_to_E3 convert_input_1(.dec(test_input_1), .E3(in_1_tb));
Decimal_to_E3 convert_input_2(.dec(test_input_2), .E3(in_2_tb));
Decimal_to_E3 convert_output_1(.dec(test_output_1), .E3(out_1_tb_exp));

/* Modulul testat */
E3_Adder DUT(.in_1(in_1_tb), .in_2(in_2_tb), .out_1(out_1_tb_actual));

initial begin
/* parametrii configurabili */
DISPLAY_ALL = 1\'b1;
DISPLAY_ONLY_FAILED = 1\'b1;
MAX_VAL_in1 = 11\'d500;
MAX_VAL_in2 = 11\'d500;
/* ======================== */
n_tests_total = (MAX_VAL_in1 + 1) * (MAX_VAL_in2 + 1);
n_tests_passed = 0;
if(MAX_VAL_in1 > 999 || MAX_VAL_in2 > 999) begin
$display(\"[WARNING] Testul nu va functiona cum trebuie! Valorile maxime NU trebuie sa fie mai mari de 999\");
end
for(test_input_1 = 0; test_input_1 <= MAX_VAL_in1; test_input_1 = test_input_1 + 1) begin
for(test_input_2 = 0; test_input_2 <= MAX_VAL_in2; test_input_2 = test_input_2 + 1) begin
test_output_1 = test_input_1 + test_input_2;
#1;
$display(\"Test nr: %d\", test_input_1 * (MAX_VAL_in2 + 1) + test_input_2 + 1);
if(DISPLAY_ALL == 1\'b1) begin
$display(\"Pentru urmatoarele intrari:\\nin_1(decimal) = %d, in_1(E3) = %b \\nin_2(decimal) = %d, in_2(E3) = %b \\n\", test_input_1, in_1_tb, test_input_2, in_2_tb);
$display(\"Rezultatul asteptat: out_1(decimal) = %d, out_1(E3) = %b\", test_output_1, out_1_tb_exp);
$display(\"Rezultatul obtinut: out_1(E3) = %b\", out_1_tb_actual);
end
if(out_1_tb_exp == out_1_tb_actual) begin
if(DISPLAY_ONLY_FAILED == 0) begin
$display(\"Testul este PASSED\");
end
n_tests_passed = n_tests_passed + 1;
end
else begin
$display(\"Testul este FAILED\");
$display(\"EXP E3: %b_%b_%b_%b =/= ACTUAL E3: %b_%b_%b_%b\", out_1_tb_exp[15:12], out_1_tb_exp[11:8], out_1_tb_exp[7:4], out_1_tb_exp[3:0], out_1_tb_actual[15:12], out_1_tb_actual[11:8], out_1_tb_actual[7:4], out_1_tb_actual[3:0]);
end
$display(\"=============================================================================================================\");
$display(\"\");
$display(\"\");
end
end
$display(\"Teste passed: %d / %d\", n_tests_passed, n_tests_total);
end
endmodule
 
On Wednesday, December 14, 2022 at 8:51:13 AM UTC-4, Virulog_X wrote:
Excess 3 Adder: Add 2 three digits numbers in excess 3.
ex. 998+345 in excess 3.

i don\'t have any idea on how to continue, please help.
thx !

module Decimal_to_E3(input[10:0] dec, output reg[15:0] E3);
reg[10:0] aux;
reg[1:0] counter;
always @ (dec) begin
aux = dec;
E3 = {4{4\'b0011}};
counter = 2\'b00;
while(aux != 0) begin
E3[counter * 4 +: 4] = aux % 10 + 3;
aux = aux / 10;
counter = counter + 1;
end
end
endmodule


//E3_Adder

module E3_Adder(input [11:0] in_1, in_2,
output [15:0] out_1);

PA v1(in_1[3:0],in_2[3:0], out_1[3:0], cout);
//how do i continue ????

endmodule



module PA(a,b,sum,cout);
input [3:0]a, b;
output cout;
output [3:0]sum;
wire c0,c1,c2;
HA u1(a[0], b[0], sum[0], c0);
FA u2(a[1], b[1], c0, sum[1], c1);
FA u3(a[2], b[2], c1, sum[2], c2);
FA u4(a[3], b[3], c2, sum[3], cout);
endmodule



module FA(a, b, cin, sum, carry);
input a, b, cin;
output sum, carry;
wire sum, carry;
assign sum = a^b^cin;//sum bit
assign carry = ((a&b) | (b&cin) | (a&cin));//carry bit
endmodule


module HA(a, b, sum, carry);
input a, b;
output sum, carry;
wire sum, carry;
assign sum = a^b;
assign carry = a&b;
endmodule


/*
module P_Adder(a,b,sum, cin, cout);
input a
*/


module Decimal_to_E3_tb();
reg[10:0] dec_tb;
wire[15:0] E3_tb;

Decimal_to_E3 DUT(.dec(dec_tb), .E3(E3_tb));
initial begin
for(dec_tb = 0; dec_tb <= 2000; dec_tb = dec_tb + 1) begin
#1;
$display(\"For value = %d, the output is = %0X\", dec_tb, E3_tb);
end
end
endmodule

/*
Arhitectura lui E3_Adder_tb este:
______________________________ ________________________
| | | |
test_input_1 --.------>|>dec E3>|---in_1_tb---->|>in_1 |
| | Decimal_to_E3 | | |
| |_____________________________| | | ___________
| | E3_Adder | | |
| ______________________________ | [DUT] out_1>|----out_1_tb_actual-------------------------------->| |
| | | | | | |
test_input_2 - ( --.-->|>dec E3>|---in_2_tb---->|>in_2 | | |
| | | Decimal_to_E3 | | | | |
| | |_____________________________| |________________________| | |
| | _________ ______________________________ | Comparare |----REZULTAT_TEST-------
| |---------------------test_input_2-------->| | | | | |
| | | | | | |
| | + |-----test_output_1--->|>dec E3>|---out_1_tb_exp---->| |
| | | | Decimal_to_E3 | | |
|-------------------------test_input_1-------->|_________| |______________________________| |___________|
*/
module E3_Adder_tb();
/*
Urmatorii parametrii ai testului pot fi modificati:
DISPLAY_ALL: 0 sau 1. Daca DISPLAY_ALL este 1, atunci mai multe detalii despre fiecare test vor fi afisate pe ecran.
Altfel, doar rezultatul testului va fi tiparit, cu diferenta dintre rezultatul corect si cel caclulat de E3_Adder, in cazul in care difera.
DISPLAY_FAILED: 0 sau 1. Daca DISPLAY_FAILED este 1, atunci doar testele failed vor fi afisate pe ecran. Altfel, si rezultatele passed se vor afisa.
NAX_VAL_in1: Valoarea maxima la care poate ajunge intrarea in_1, exprimata in decimal.
MAX_VAL_in2: Valoarea maxima la care poate ajunge intrare in_2, exprimata in decimal.
Testul va lua toate perechile de (in_1, in_2) din intervalul MAX_VAL_in1 X MAX_VAL_in2 si va compara rezultatul obtinut de E3_Adder cu cel corect

IMPORTANT: Nota pentru testbenchul public va fi acordata pentru testele care ruleaza cu MAX_VAL_in1 = 500 si MAX_VAL_in2 = 500
*/

wire[11:0] in_1_tb, in_2_tb;
reg[10:0] test_input_1, test_input_2, test_output_1;
wire[15:0] out_1_tb_actual, out_1_tb_exp;


reg[10:0] MAX_VAL_in1, MAX_VAL_in2;
reg DISPLAY_ALL, DISPLAY_ONLY_FAILED;
integer n_tests_passed, n_tests_total;
/* Modul ajutator de convertire din decimal in E3 */
Decimal_to_E3 convert_input_1(.dec(test_input_1), .E3(in_1_tb));
Decimal_to_E3 convert_input_2(.dec(test_input_2), .E3(in_2_tb));
Decimal_to_E3 convert_output_1(.dec(test_output_1), .E3(out_1_tb_exp));

/* Modulul testat */
E3_Adder DUT(.in_1(in_1_tb), .in_2(in_2_tb), .out_1(out_1_tb_actual));

initial begin
/* parametrii configurabili */
DISPLAY_ALL = 1\'b1;
DISPLAY_ONLY_FAILED = 1\'b1;
MAX_VAL_in1 = 11\'d500;
MAX_VAL_in2 = 11\'d500;
/* ======================== */
n_tests_total = (MAX_VAL_in1 + 1) * (MAX_VAL_in2 + 1);
n_tests_passed = 0;
if(MAX_VAL_in1 > 999 || MAX_VAL_in2 > 999) begin
$display(\"[WARNING] Testul nu va functiona cum trebuie! Valorile maxime NU trebuie sa fie mai mari de 999\");
end
for(test_input_1 = 0; test_input_1 <= MAX_VAL_in1; test_input_1 = test_input_1 + 1) begin
for(test_input_2 = 0; test_input_2 <= MAX_VAL_in2; test_input_2 = test_input_2 + 1) begin
test_output_1 = test_input_1 + test_input_2;
#1;
$display(\"Test nr: %d\", test_input_1 * (MAX_VAL_in2 + 1) + test_input_2 + 1);
if(DISPLAY_ALL == 1\'b1) begin
$display(\"Pentru urmatoarele intrari:\\nin_1(decimal) = %d, in_1(E3) = %b \\nin_2(decimal) = %d, in_2(E3) = %b \\n\", test_input_1, in_1_tb, test_input_2, in_2_tb);
$display(\"Rezultatul asteptat: out_1(decimal) = %d, out_1(E3) = %b\", test_output_1, out_1_tb_exp);
$display(\"Rezultatul obtinut: out_1(E3) = %b\", out_1_tb_actual);
end
if(out_1_tb_exp == out_1_tb_actual) begin
if(DISPLAY_ONLY_FAILED == 0) begin
$display(\"Testul este PASSED\");
end
n_tests_passed = n_tests_passed + 1;
end
else begin
$display(\"Testul este FAILED\");
$display(\"EXP E3: %b_%b_%b_%b =/= ACTUAL E3: %b_%b_%b_%b\", out_1_tb_exp[15:12], out_1_tb_exp[11:8], out_1_tb_exp[7:4], out_1_tb_exp[3:0], out_1_tb_actual[15:12], out_1_tb_actual[11:8], out_1_tb_actual[7:4], out_1_tb_actual[3:0]);
end
$display(\"=============================================================================================================\");
$display(\"\");
$display(\"\");
end
end
$display(\"Teste passed: %d / %d\", n_tests_passed, n_tests_total);
end
endmodule

Perhaps you are not aware this is a VHDL group, not Verilog.

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